An Overview of Time-Interleaved Noise-Shaping ADCs: Fundamentals, Challenges, and Prospects

Noise-shaping (NS) analog-to-digital converter (ADC) offers high resolution and competitive power efficiency characteristics, but its bandwidth (BW) is inherently limited by the oversampling (OS) requirement. To meet the growing demand for wider BWs, the time-interleaved (TI) technique has been introduced into NS ADCs. However, inter-channel feedback paths in TI NS ADCs increase the system complexity and introduce non-causal signal paths. To mitigate this challenge, recent literature has explored two emerging types of TI NS-ADCs: the TI NS successive-approximation-register (SAR) architecture using midway feedback, and the TI delta-sigma modulator (DSM) based on an extrapolation architecture. This article reviews the fundamental principles of TI NS ADCs, including their timing diagrams, basic architectures, and key design considerations, and concludes with illustrations of recent state-of-the-art (SotA) design examples.