Folded Electromagnetic Metastructure for Microchip Packaging

Electromagnetic metastructure-based interconnects offer a potential solution to parasitic effects, however, their integration into microelectronic packaging has been hindered by a fundamental trade-off between their physical size and operating frequency, leading to impractically large footprints for gigahertz operation. This work introduces a novel approach to overcome this challenge by vertically folding the metastructure into a multilayer, via-connected structure. Through comprehensive simulation and experimental validation, we demonstrate a tenfold footprint reduction to 575 µm, making the size of proposed waveguide comparable to the pitch of state-of-the-art ball-grid-array packaging, while maintaining operation at 6 GHz, compatible to VLSI clock frequency. The optimized design achieves an 18 dB reduction in cross-talk noise compared to a buried microstrip line of the same footprint, effectively halving the cross-talk noise spikes as confirmed by time-domain analysis. This work validates a viable pathway for integrating high-performance, compact metastructure-based interconnects into commercial chip designs.