On-Chip Dual-Band Balanced Power Divider with High Common-Mode Rejection
Abstract
A compact on-chip dual-band balanced power divider using bridged T -coils is proposed, which is capable of rejecting the common-mode inputs. Specifically, a proposed 10.7/20-GHz dual-band balanced power divider is implemented in bulk CMOS with a circuit size of only 1.25 mm × 1.14 mm. The measured differential-mode insertion loss is 6.9/8.0 dB, and the measured common-mode rejection is 30.4/27.7 dB at 10.7/20 GHz. Good input/output matching and isolation performance are also achieved.
Fields of Study & Subjects
Radio Frequency Integrated Circuit Design
Microwave Engineering and Waveguides
Low-power high-performance VLSI design
Publication details
- Journal / source
- 2026 IEEE Radio and Wireless Symposium (RWS)
- Publisher
- IEEE
- Pages
- 69–72
- Publication date
- 18 January 2026