A Structured Approach for Integrating Environmental Impact Assessment Throughout the IC Design Flow

The production, use and disposal of integrated circuits cause multiple impacts on the environment, as a substantial carbon footprint, intensive water and energy use, and the generation of toxic waste. These impacts must be evaluated and mitigated since the design of the circuits. Despite the rising number of initiatives to quantify and optimize the end-to-end carbon footprint of circuits, there is a lack of analysis about how to integrate the assessment of multiple environmental impacts along the design flow. To address this gap, we propose a structured approach for the systematic integration of environmental assessment throughout the flow and we establish key requirements for ecodesign tools. We demonstrate that: 1) a preliminary, coarse-grain evaluation of the environmental impacts can be performed since the front-end phase of the design flow, but some metrics for environmental optimization can be applied only in the back-end; 2) designing circuits for multiple environmental criteria yields distinct solutions compared to optimizing for carbon only.