System-Level Comparison of Superconductor-Semiconductor Interface Circuits

Cryogenic computing systems often require communication between single flux quantum (SFQ) circuits at 4 K and CMOS circuits at a higher temperature stage. Interface circuits such as a 4JL (four-junction logic) gate and a SQUID (superconducting quantum interference device) stack have previously been used for SFQ-CMOS data links, but they have only been used for systems contained at 4 K. When communicating with CMOS circuits at a higher temperature stage, these interface circuits must be implemented in accordance with a holistic analysis of the entire cryogenic computing system. We have conducted an analysis in which we compare the impact of a 4JL gate and a SQUID stack on a system designed for the HYPRES ICE-T. For our analysis, we use the CORE e4 RSFQ microprocessor as the SFQ circuitry at 4 K. We provide guidelines for deciding between a 4JL gate and a SQUID stack as superconductor-semiconductor interface circuits in hybrid computing systems with multiple temperature stages.