A Physics-Constrained Neural Network Method for Compact Modeling of Semiconductor Devices

This work proposes a physics-constrained neural network (PCNN) method for automated and physically consistent compact modeling of semiconductor devices. Traditional ANN-based approaches often exhibit limited enforcement of physical monotonicity and symmetry, suffer from poor generalization, and require complex manual data preprocessing. The proposed method addresses these challenges through two core innovations: a self-adaptive data preprocessing strategy that eliminates manual intervention, and a weight-generation neural architecture that embeds physics-inspired constraints to ensure monotonicity and symmetry. Extensive device- and circuit-level evaluations demonstrate the effectiveness of the method. On average, a 3.2× reduction in mean relative error (MRE) is achieved in modeling I-V and C-V characteristics across the devices evaluated in this work compared with ANN-based models. In circuit-level simulations, the method reduces the power-delay product (PDP) error from 50% to 7% in a 17-stage ring oscillator and lowers the gain error from 5.7% to 0.4% in a common-source amplifier. Additionally, transient simulation time is reduced by up to 70% compared to ANN-based models. These results highlight that the proposed method not only improves physical consistency and modeling accuracy but also enables scalable and efficient SPICE-level simulation, paving the way for practical AI/ML-assisted compact model development.