ASGF4EPD: An Automated Schematic Generation Framework for Electronic Product Design

As electronic product design complexity grows exponentially, traditional manual schematic drawing faces significant challenges, including low efficiency, inconsistent specifications, and high error rates, leading to prolonged design cycles, difficult collaboration, and high repair costs. To address these issues, an automatic schematic generation framework for electronic product design is proposed, called ASGF4EPD. First, a pin rule-based schematic design method is applied. This method determines the specific models and connections of the power-using modules through structured requirements modeling and pin connection rules. It also uses a combination of voltage hierarchy analysis and backtracking search for power supply module selection to complete the schematic design. Second, a quadtree spatial division-based schematic layout method is applied for efficient canvas space management and module placement. Furthermore, the layout is optimized by fragmented spaces filling, module moving and boundary alignment operations. Experimental results show that the proposed framework outperforms state-of-the-art methods, achieving an average functional completion rate of 100%, an electrical rule checking score of 85.04, and a design time of 2.96 seconds on tested problems.