TransMap: Transformer-Enhanced Divide-and-Conquer Reinforcement Learning Framework for Efficient CGRA Compilation

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Authors: Jingyuan Li, Wenbo Yin, Lingli Wang
Cited by: 1
References: 56

Abstract

Coarse-grained reconfigurable architectures (CGRAs) combine flexibility with high performance, making them a promising solution for data-intensive computing. CGRA compilers are essential for determining how data flow graphs (DFGs) are executed on hardware. Recently, machine learning-based compilers have garnered significant attention for CGRA compilation. However, few deep learning compilers leverage the rich attentional information between DFGs and the CGRA abstractions effectively. Meanwhile, traditional compilers continue to struggle with inadequate compilation quality and long compilation time. In this paper, we propose a novel deep learning-based compiler that integrates transformer encoders with reinforcement learning (RL) to address these issues. The transformer encoder captures task dependencies by embedding feature maps from both the DFG and CGRA abstraction. Additionally, we design a tree-structured RL agent that employs spectral clustering to explore the extensive mapping solution space, optimizing task-to-resource allocation. Experimental results demonstrate that our method outperforms state-of-the-art (SOTA) compilers, achieving an average 1.22× improvement in compilation quality, a 33.39% increase in throughput, and a 12.83× speedup in compilation time, underscoring its potential to enhance CGRA performance.

Fields of Study & Subjects

Embedded Systems Design Techniques Parallel Computing and Optimization Techniques Logic programming and type systems

Publication details

Journal / source
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Volume
45
Issue
9
Pages
4298–4310
Publication date
13 January 2026