Homonoia: Reinventing Underutilized Cross-Level Cache Resource Using Reinforcement Learning
Abstract
On-chip cache resources play a crucial role in determining the performance of multi-core processors. However, certain cache resources of multi-core processors may be underutilized in a few scenarios. The rigid cache hierarchy poses an obstacle to leveraging these underutilized cache resources to benefit cache-sensitive applications. Additionally, modern processor designs tend to deepen cache levels, and share out last-level cache (LLC) capacity to individual upstream caches, resulting in fewer available LLC resources per core and potentially more underutilized cache resources. To tackle this challenge, we introduce Homonoia, a technique that reinvents underutilized cache resources, disregarding inherent constraints of cache hierarchies, and expands LLC capacity with these resources for cache-sensitive applications. The key idea of Homonoia is to allow LLC evictions with high reusability to be deposited in on-chip caches instead of being directly written back to off-chip memory. Moreover, Homonoia incorporates a reinforcement learning-based predictor to accurately forecast the reusability of LLC evictions under diverse workload scenarios. A novel coherence protocol feature called DEPOSIT is proposed to ensure the efficiency of depositing behavior and transparency to software. Our experimental results demonstrate that Homonoia significantly improves the performance of baseline multi-core processors by an average of 20% in several cache-sensitive applications.
Fields of Study & Subjects
Parallel Computing and Optimization Techniques
Low-power high-performance VLSI design
Network Packet Processing and Optimization
Publication details
- Journal / source
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
- Volume
- 45
- Issue
- 10
- Pages
- 4800–4813
- Publication date
- 27 January 2026