Two-MOSFETs-Based Memristor Emulator for Ultra-High-Frequency Signal Processing

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Authors: Gouranga Mandal, Pulak Kumar Mondal, Mourina Ghosh, Sung-Mo Kang
Cited by: 1
References: 23

Abstract

This article proposes a novel memristor emulator design capable of operating in the ultra-high-frequency range. The proposed memristor emulator, implemented using two nMOS transistors and a grounded MOS-capacitor, is designed and simulated in the Analog Design Environment of Cadence Virtuoso using a 90nm CMOS technology. It achieves a maximum operating frequency of 3 GHz, with a power consumption of 13.52 μW. The robustness of the proposed memristor emulator is validated through extensive simulations, including temperature variations, process corners, capacitance variations, and different combinations. Additionally, short-term non-volatility analysis has been conducted to evaluate its memory characteristics. The layout of the proposed memristor emulator is presented, along with pre-layout and post-layout simulations. Furthermore, hardware validation has been performed using commercial ICs (IRF840). Applications such as an 8:3 encoder, an adaptive neural network, and a ring oscillator circuit using the proposed memristor emulator are also reported in this article. The simulation results confirm that the memristive encoder functions correctly at 2 GHz and the ring oscillator generates an oscillation frequency greater than 2 GHz, demonstrating the emulator’s suitability for ultra-high-frequency applications.

Fields of Study & Subjects

Advanced Memory and Neural Computing Radio Frequency Integrated Circuit Design Ferroelectric and Negative Capacitance Devices

Publication details

Journal / source
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Volume
45
Issue
10
Pages
1–1
Publication date
1 January 2026