A Delay Fault Model Based on Functionally Possible Clusters of Path Delay Faults
Abstract
Small delay defects are detected by tests for path delay faults. The path selection strategy depends on whether the defects are expected to be localized or distributed. This article suggests a delay fault model that encompasses both options by avoiding path selection altogether. Instead, the model considers clusters of transition faults that represent path delay faults implicitly. To limit the number of faults and tests, only functionally possible clusters are considered, where all the transition faults are functionally possible. In addition, the lengths of the paths in a cluster are bounded from below to ensure that long paths, and small delay faults, are detected. A test compaction procedure combines tests and their clusters to reduce the number of tests. The computation of clusters and the test compaction procedure were implemented in an academic simulation environment and applied to benchmark circuits. The results demonstrate their effectiveness, and the feasibility of considering the cluster based fault model.
Fields of Study & Subjects
VLSI and Analog Circuit Testing
Software Testing and Debugging Techniques
Radiation Effects in Electronics
Publication details
- Journal / source
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
- Volume
- 45
- Issue
- 10
- Pages
- 4890–4900
- Publication date
- 2 February 2026