Hardware-Model Co-Optimization of Compressed Neural Network Accelerator for Real-Time Compensation in Precision Motion Control

For precision motion control systems, real-time feedforward compensation is indispensable, yet its implementation is constrained by latency, computational/storage hardware resources. Classic approaches, including online model-based feedforward and iterative learning control feedforward, fail to balance accuracy and generalization. Although offline neural network feedforward (NN-FF) has emerged as a potent alternative, in-depth investigation into its real-time deployment is still lacking. Furthermore, even state-of-the-art, offline recurrent NN-FF (RNN-FF) models impose substantial demands on hardware resources (due to large parameters and inherent sequential processing), making them less suitable for efficient real-time implementation. This paper proposes a generalized hardware-model co-optimization framework for real-time NN-FF. Specifically, we develop Motion Residual Convolution (MRC): a compact CNN-based model with high accuracy, strong generalization, lightweight design, and inherent parallelism for latency reduction. Correspondingly, we construct an accelerator core with 10 vector multiply-accumulate (VMAC) units for multi-filter parallel processing. For two scenarios with distinct priorities, specifically the resource-constrained and the latency-constrained, we adopt spatial feedforward acceleration engine (SFAE) and temporal feedforward acceleration engine (TFAE), respectively. SFAE maximizes throughput via independent VMAC arrays per convolutional layer, while TFAE optimizes resource utilization through time-multiplexing a single VMAC array across layers. Experiments indicate MRC outperforms RNN-based counterparts in accuracy, using