Board-Level Reliability Evaluation and Optimization of Power MOSFET Module Under Thermal Cycling Conditions

Power metal-oxide-semiconductor field-effect transistors (MOSFETs) are extensively used in high-power and high-frequency applications due to their high current capacity, superior switching performance, and ease of integration with compact designs. However, the reliability of MOSFETs can be significantly compromised by solder joint fractures between the MOSFET and Printed Circuit Board (PCB) during board-level thermal cycling testing. To address this issue, this study develops a three-dimensional (3D) computational model that approximates the thermomechanical properties of the PCB copper trace layer using the rule-of-mixtures principle. The model is used to evaluate the thermal cycle-on-board reliability of the solder joints during thermal cycling between -40°C and 125°C. The accuracy of the simulation model is validated by comparing the predicted out-of-plane deformation of the MOSFET package with the experimental results. The Anand viscoplastic constitutive model is employed to analyze the accumulated plastic work density (ΔW) per cycle in the solder joints over repeated thermal cycles. Additionally, a Taguchi experimental design approach is used to evaluate the influence of eight control factors on the plastic work density (PWD), including the clip layout, type and thickness of the epoxy molding compound, die thickness, solder joint thickness, PCB copper foil coverage, copper foil thickness, and PCB core thickness. By systematically evaluating these parameters, an optimal package design is identified that minimizes ΔW and enhances the reliability of the MOSFET assembly. The Taguchi results reveal that the thermomechanical reliability of the MOSFET package is primarily determined by the type of epoxy molding compound and the thickness of the solder joints.