FPSpike: A Fully Parallel and Reconfigurable Architecture for Accelerating Spiking Neural Networks With Structured Sparsity

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Authors: Mingyang Li, Yirong Kan, Man Wu, Renyuan Zhang, Yasuhiko NAKASHIMA
Cited by: 2
References: 39

Abstract

This paper introduces FPSpike, a fully-parallel and reconfigurable architecture for accelerating spiking neural networks (SNNs) with structured sparsity. By introducing structured sparse synaptic connections, the neuron computation and weight storage costs are significantly reduced, while the wiring constraints of hardware implementation are alleviated, thus realizing a fully parallel SNN architecture on a single chip. Furthermore, FPSpike achieves high reconfigurability through local connections, allowing the network topology to be flexibly partitioned into multiple distinct hardware cores without redundancy, thereby enabling multi-task spatial parallel processing. In particular, a series of software-hardware co-designs are performed to improve the performance of FPSpike. Experimental results with FPGA-based implementation demonstrate that FPSpike achieves inference throughput improvements of$2.5\times \sim 43.9\times $and$3.2\times \sim 93.8\times $compared to Intel i7-12700K CPU and NVIDIA RTX3060Ti GPU, respectively. FPSpike also achieves performance speedups of$2.0\times \sim 20.2\times $and energy efficiency improvements of$1.3\times \sim 7.7\times $compared to the state-of-the-art FPGA-based SNN accelerators.

Fields of Study & Subjects

Advanced Memory and Neural Computing Advanced Neural Network Applications Ferroelectric and Negative Capacitance Devices

Publication details

Journal / source
IEEE Transactions on Circuits and Systems I Regular Papers
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Volume
73
Issue
5
Pages
3546–3559
Publication date
6 January 2026