A 0.52% Nonlinearity, 44.9 $\mathrm{zF}/\sqrt{\mathrm{Hz}}$ Input Capacitance Noise C/V Converter With the Proposed SA-MD Technique for MEMS Accelerometer
Abstract
A 0.52% nonlinearity,$44.9zF/\sqrt {Hz}$input capacitance noise capacitance-to-voltage (C/V) converter for MEMS accelerometer is proposed in this study. The multi-step successive approximation (SA) output mechanism is proposed to replace the conventional single-step conversion. Meanwhile, combining with the modulation-demodulation (MD) technique in the traditional continuous-time (CT) C/V converter, a much lower nonlinearity and noise CT C/V converter without increasing power consumption is achieved in this work. In addition, a short time reset signal between modulation and demodulation is proposed to reset the integration capacitors in each conversion cycle, which lets the C/V converter achieve an approximate twice dynamic range enhancement (DRE). The proposed C/V converter is implemented in a standard 180 nm CMOS process. It incorporates an on-chip capacitor signal generator (CSG), whose capacitance is tuned from −80 fF to 80 fF using clock signals at frequencies of 10Hz, 1 kHz, 2 kHz, 3 kHz, 4 kHz, and 5 kHz respectively, where measurement results demonstrate that the converter has correct output voltage across this frequency range, with a conversion error of less than$350~ppm/\sqrt {Hz}$. The proposed C/V converter is also tested together with an integrated a MEMS accelerometer element. It achieves a maximum nonlinearity as low as 0.52% within ±10 g acceleration and obtains equivalent input noise power spectral density (PSD) as low as$44.9~zF/\sqrt {Hz}$when the frequency is beyond 50 Hz.
Fields of Study & Subjects
Analog and Mixed-Signal Circuit Design
Advanced MEMS and NEMS Technologies
Sensor Technology and Measurement Systems
Publication details
- Journal / source
- IEEE Transactions on Circuits and Systems I Regular Papers
- Volume
- 73
- Issue
- 7
- Pages
- 4631–4640
- Publication date
- 16 February 2026
- Language
- EN