Lightweight High-Throughput Portable Multi-Mode Reconfigurable Integrated PUF-TRNG

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Authors: Xiangyu Dong, Liang Yao, Peng Ding, Jinlin Chen, Mingjing Qiu, Peiyang Kang, Zhengfeng Huang, Yingchun Lu, Huaguo Liang, Yaohua Xu
Cited by: 0
References: 29

Abstract

Privacy-Preserving Mutual Authentication (PPMA) protocols utilize Physical Unclonable Function (PUF) and True Random Number Generator (TRNG) as security primitives to protect privacy. To ensure the security of Internet of Things (IoT) nodes in untrusted environments, PPMA keys and encrypted data must reside on the same chip. The concept of integrating PUF and TRNG on a single device has thus emerged as a new security paradigm. This paper proposes a novel lightweight, portable, multi-mode reconfigurable integrated PUF-TRNG architecture resistant to machine learning attacks. Through co-design, the architecture achieves the integration and switching among three modes: Arbiter Physical Unclonable Function (APUF), Ring Oscillator Physical Unclonable Function (RO PUF), and TRNG. The APUF mode leverages the RO PUF mode for assistance, endowing it with machine learning resistance, where the highest prediction rates using Logistic Regression (LR), Support Vector Machine (SVM), CMA (Comparative Model Analysis), and Deep Neural Network (DNN) algorithms are only around 60%. Additionally, a lightweight authentication protocol is proposed to further enhance resistance against machine learning attacks. In TRNG mode, the architecture has two outputs, each capable of generating random numbers at 800 Mbps, resulting in a total throughput of 1600 Mbps. The generated random numbers have successfully passed various tests, including NIST SP800-22, NIST SP800-90B, AIS-31, and TESTU01. In the NIST SP800-22 test, the pass rates for both outputs of the Artix-7 and Kintex-7 FPGAs are approximately 99%.

Fields of Study & Subjects

Physical Unclonable Functions (PUFs) and Hardware Security Cryptographic Implementations and Security Chaos-based Image/Signal Encryption

Publication details

Journal / source
IEEE Transactions on Circuits and Systems I Regular Papers
Volume
73
Issue
5
Pages
3284–3295
Publication date
4 March 2026
Language
EN