A 0.01-mm 2 3- μ W ADC-Less Analog Front-End Circuit With PRBS-Based Rejection of Distortion for Time-Based EIS Measurements

This work presents a low-power readout integrated circuit (ROIC) for time-based impedance monitoring of impedimetric sensors. The proposed architecture measures the sensor’s normalized impulse response (IR), eliminating the need for an analog-to-digital converter (ADC) and simplifying the analog front-end (AFE) with a two-stage dynamic comparator. The subsequent distortion is attenuated by averaging multiple measurements obtained using different generating polynomials of the excitation signal, emulating an ADC. The circuit operates across excitation frequencies from 98 Hz to 1.25 MHz, consuming only$\mathrm {3~\mu \text {W} }$in a compact 0.01 mm2area, making it well-suited for portable, miniaturized wearable systems. The maximum signal-to-noise ratio (SNR) of 31 dB is achieved with an excitation frequency of 100 kHz. In this configuration, a 1023-samples IR is measured over a 50 kHz bandwidth and an excitation time of 163.7 ms. The resulting performance achieves a dynamic range (resistive) figure-of-merit ($\text {FoM}_{\text {DR}}$) of 162.6 dB, surpassing the state-of-the-art, while the signal-to-noise ratio figure-of-merit ($\text {FoM}_{\text {SNR}}$) of 151.3 dB remains competitive with existing solutions. Finally, measurements with real sensors are provided, showing the effectiveness of the circuit design.