A High-Efficiency Reconfigurable Charge Pump With Full Capacitance Utilization and Two-Dimensional Multiphase Interleaving

This paper presents a reconfigurable high-voltage charge pump with regulated output, designed to deliver high efficiency across a wide operating range. Different from previous designs, the charge pump is reconfigured by connecting unit cells in series or parallel, achieving full capacitance utilization and hence improved power efficiency. The stage reconfiguration circuit is implemented without using high-voltage tolerant devices and allows modularity and scalability. Two-dimensional multiphase interleaving is proposed to enhance power efficiency while reducing the input current ripple and output voltage ripple. The system was fabricated in a 55 nm standard CMOS process occupying a core area of 470 μm by 225 μm. Experimental results indicate the maximum increase in efficiency for different load currents is 10%. The peak efficiency increases from 46.2% to 51.4% at a 150-μA load and 8-V output while achieving >42% overall efficiency.