A 2.4-GHz −247.7-dB Jitter-FoM Ring-VCO-Based Injection-Locked PLL With Triple-Point Injection and Injection Timing-Pulsewidth Calibration
Abstract
This brief introduces an injection-locked phase-locked loop (ILPLL) with triple-point injection and background injection pulse self-calibration techniques. The proposed triple-point injection scheme effectively eliminates the phase shift induced by conventional direct injection while enhancing injection strength by combining direct injection, cross-coupled complementary injection, and tail injection, thereby achieving low jitter. Furthermore, concurrent calibration of both injection timing and pulsewidth provides further jitter suppression and ensures low spur. Fabricated in a 28-nm CMOS process, the proposed ILPLL achieves an RMS jitter of 135 fs, a reference spur of -70.9 dBc, and a state-of-the-art FoMjitterof -247.7 dB at an operating frequency of 2.4 GHz. The proposed ILPLL consumes 9.3 mW power from a 0.9 V supply and occupies an active area of 0.02 mm2.
Fields of Study & Subjects
Advancements in PLL and VCO Technologies
Radio Frequency Integrated Circuit Design
Low-power high-performance VLSI design
Publication details
- Journal / source
- IEEE Transactions on Circuits & Systems II Express Briefs
- Volume
- 73
- Issue
- 4
- Pages
- 408–412
- Publication date
- 26 February 2026
- Language
- EN