A Low-Quiescent-Current Output-Capacitorless Low-Dropout Regulator With a Dual-Path Adaptive-Biasing Technique

This brief presents an output-capacitorless low-dropout regulator (OCL-LDO) featuring low power consumption and fast transient response. A dual-path adaptive-biasing (DP-AB) technique is introduced, improving conventional adaptive biasing for IoT applications. The proposed LDO uses a negative-feedback path to adaptively counteract positive-feedback component of conventional adaptive biasing under light loads, suppressing inner-loop gain for enhanced stability without raising quiescent current, while preserving heavy-load performance. Fabricated in a 180-nm BCD process with a core area of 0.021 mm2, it achieves 2.2 μA quiescent current and 40 mA maximum load. Measurements show 0.16-V undershoot and 168-ns recovery for a 0 A to 40 mA load step with 75-ns edge time. By overcoming conventional adaptive-biasing power limitations, the design delivers low static current and rapid transient response.