Characterizing Threshold Voltage Drift of BTI Stress in SiC MOSFET From First-Principle Calculations
Abstract
This study integrates experiments and density functional theory (DFT) to unravel atomic mechanisms of threshold voltage drift (ΔVth) in SiC MOSFETs under bias temperature instability (BTI). Direct current (DC)-BTI tests show polarity-dependent ΔVth(positive/negative shifts under ±gate bias), while alternating current (AC)-BTI yields persistent positive ΔVthunder high stress. Based on the experimental observations, this work establishes four defect models for SiC MOS devices. Among them, the O₂-C≡C-O₂, Si₂-C≡C-Si₂, and VOdefects exhibit a higher electron trapping rate than the hole detrapping rate under positive bias conditions, accounting for the positive ΔVthobserved during PBTI experiments. In contrast, the NSidefect demonstrates a higher hole trapping rate than its electron detrapping rate, explaining the negative ΔVthin NBTI experiments. This behavior elucidates both positive and negative ΔVthunder DC-BTI stress. Furthermore, the ratio between electron and hole charge transfer rates for the O₂-C≡C-O₂, Si₂-C≡C-Si₂, and VOdefects are more pronounced than that of the NSidefect, confirming the positive ΔVthobserved under AC-BTI stress. These defect-mediated dynamics establish a quantitative model linking atomic-scale charge imbalances to reliability degradation in wide-bandgap devices, highlighting defect engineering as critical for mitigatingVthinstability in power electronics.
Fields of Study & Subjects
Silicon Carbide Semiconductor Technologies
Advancements in Semiconductor Devices and Circuit Design
Semiconductor materials and devices
Publication details
- Journal / source
- IEEE Transactions on Device and Materials Reliability
- Publisher
- Institute of Electrical and Electronics Engineers (IEEE)
- Volume
- 26
- Issue
- 1
- Pages
- 178–183
- Publication date
- 3 February 2026