Ideal Specific On-Resistance Versus Single-Event Burnout and Leakage Voltage Thresholds in Vertical SiC Power Devices

IEEE Transactions on Device and Materials Reliability 2026 Open access

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Authors: Steven L. Kosier, Arijit Sengupta, Sajal Islam, Dennis R. Ball, John M. Hutson, Andrew L. Sternberg, Arthur F. Witulski, Ronald D. Schrimpf, Kenneth F. Galloway, Michael L. Alles, Jason M. Osheroff
DOI: 10.1109/tdmr.2026.3689763
Cited by: 1
References: 18

Abstract

Ideal one-dimensional expressions for Single Event Burnout (SEB) Voltage and Single Event Leakage Current (SELC) Voltage in vertical SiC power devices are derived. The derivation employs the critical energy storage and release model to show that the specific on-resistance (Rsp) varies with the SEB and SELC voltages to the 5thpower. Experimental data from MOSFETs and JBS diodes with voltage ratings of 1.2 kV to 10 kV are used to validate and illustrate the ideal limit. A physical understanding of the need for voltage derating is provided.

Fields of Study & Subjects

Silicon Carbide Semiconductor Technologies Radiation Effects in Electronics Electromagnetic Compatibility and Noise Suppression

Publication details

Journal / source
IEEE Transactions on Device and Materials Reliability
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Volume
26
Issue
2
Pages
648–651
Publication date
5 May 2026