First Demonstration of Annealing-Free Atomic-Layer-Deposited In 2 O 3 Top-Gate Devices With Robust Positive/Negative Bias Temperature Instability

In this work, we present the first demonstration of ultrathin In2O3top-gate (TG) transistors with a short-channel length of 100 nm, fabricated using back-end-of-line (BEOL)-compatible processing ($\le$250 °C) and various TG oxide deposition techniques. Plasma-enhanced ZrO2-based TG devices exhibit impressive performance, with${I}_{\text {on, {max}}} = {378}~\mu $A/$\mu $m @${V}_{\text {D}} = {1}$V, a minimum subthreshold swing (SS) of 70 mV/dec, and a threshold voltage (${V}_{\text {t}}$) shift of only 0.05 V under positive bias stress (${V}_{\text {G}} = {V}_{\text {t}}+2$V) for 10 000 s. Notably, these devices exhibit excellent switching behavior without needing post-deposition annealing, making them highly promising candidates for monolithic 3-D (M3D) integration.