Characterization of Etching Damage Induced by O 2 /BCl 3 Atomic Layer Etching for Enhancement-Mode GaN-Based HEMTs

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Authors: Qiang Wang, Shengwen Li, X. Chen, Feiyang Li, Xuan Hou
Cited by: 1
References: 34

Abstract

Atomic layer etching is a low-damage etching process that can precisely control the etching depth, which is desirable for the preparation of enhancement-mode recessed-gate GaN-based high electron mobility transistors (HEMTs). In this article, the etching damage induced by atomic layer etching (ALE) was investigated in detail. The atomic force microscopy (AFM) results showed that the ALE process did not significantly degrade the surface morphology. The interface traps’ density (${D}_{\text {it}}$), extracted from the conductance test, was as low as 0.7–$1.2\times 10{^{{12}}}$cm${}^{\text {-2}}$eV${}^{\text {-1}}$in the energy level range of 0.28–0.39 eV below the conduction band edge, demonstrating the low-damage advantage of the developed ALE process. XPS characterization has been performed to gain a better understanding of the origin of the interface traps. It was found from a transmission electron microscope (TEM) image that the amorphous layer formed by ALE was confined to a depth of 2 nm from the surface. The temperature-dependent measurements of the dual-gate structure demonstrated that the interface traps would induce surface leakage current, and the 2-D variable range hopping (2D-VRH) was the conduction mechanism of surface leakage current.

Fields of Study & Subjects

GaN-based semiconductor devices and materials Silicon Carbide Semiconductor Technologies Semiconductor materials and devices

Publication details

Journal / source
IEEE Transactions on Electron Devices
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Volume
73
Issue
3
Pages
1493–1498
Publication date
12 January 2026