Contact Length Scaling in In 2 O 3 and InGaZnO FETs: Critical Roles of Quantum Confinement and Indium Concentration Tuning
Abstract
This work presents a systematic study of contact length (${L}_{C}\text {)}$scaling in ultrathin indium oxide (In2O${}_{{3}}\text {)}$and indium–gallium–zinc oxide (InGaZnO) field-effect transistors (FETs), focusing on strategies to achieve low contact resistance (${R}_{C}\text {)}$at aggressively scaled contacted gate pitches (CGPs). Through transfer length method (TLM) analysis, we extract${R}_{C}$, transfer length (${L}_{T}\text {)}$, and contact resistivity ($\rho _{C}\text {)}$in devices with varying channel thicknesses (${T}_{\text {ch}}\text {)}$and indium concentrations. In2O3FETs with increased${T}_{\text {ch}}$from 1.2 to 2.0 nm exhibit substantial improvements in contact properties, with${L}_{T}$reduced from 67.5 to 30.4 nm,${R}_{{C}{0}}$from 302.6 to$195.7~\Omega ~\cdot $$\mu $m, and$\rho _{C}$from$1.35\times 10^{-{6}}$to$7.94\times 10^{-{8}}{\,}\Omega {\,}\cdot $cm2. Similarly, InGaZnO FETs with higher indium concentration show enhanced contact behavior approaching that of In2O3. The observed trends are explained by${E}_{C}$–charge neutrality level (CNL) band alignment models, which attribute these contact improvements to Schottky barrier height ($\Phi _{\text {SB}}\text {)}$lowering via quantum confinement (QC) and indium composition tuning. Leveraging these insights, we demonstrate aggressively scaled In2O3FETs with${L}_{C} = {L}_{\text {ch}} =40$nm and CGP = 80 nm, achieving low${R}_{C} = 140.4~\Omega ~ \cdot $$\mu $m and high maximum drain current (${I}_{\max }\text {)}$of 1.57 mA/$\mu $m. These results underscore the importance of band structure engineering for contact optimization in oxide semiconductors (OSs) and provide a pathway toward high-performance, nanoscale devices for monolithic 3-D integration.
Fields of Study & Subjects
Thin-Film Transistor Technologies
Ferroelectric and Negative Capacitance Devices
Nanowire Synthesis and Applications
Publication details
- Journal / source
- IEEE Transactions on Electron Devices
- Publisher
- Institute of Electrical and Electronics Engineers (IEEE)
- Volume
- 73
- Issue
- 2
- Pages
- 845–851
- Publication date
- 12 January 2026