Novel Charge Partitioning Compact Model Including Field-Dependent Mobility Degradation Effect for Nanoscale MOSFETs

Charge partitioning (CP) determines the segmentation of total channel charge among drain and source regions. It is widely utilized in the development of transient and high-frequency advanced compact models for MOSFET analysis. In this work, we have developed a CP compact model that is applicable for short as well as long-channel-length devices. In addition, it also incorporates field-dependent mobility degradation and bias dependency accurately. We have demonstrated accuracy improvement with transient analysis over the industry standard BSIM-CMG compact model, which uses the traditional Ward-Dutton (WD) CP scheme. We have also illustrated the presented model’s utility at high-frequency operation through two-port parameter analysis. Results show that the proposed model shows good agreement with the TCAD data. The proposed model has been implemented in Verilog-A and is compatible with the existing industry standard BSIM-CMG framework. This work provides the first analytical CP compact model formulation taking a second-order effect into account.