Indium-Gallium-Zinc Oxide Thin-Film Transistor Optimization for Memristive Applications

Read full text
Authors: Alin Panca, Hannah J. Levene, Andreas Tsiamis, Spyros Stathopoulos, T. Prodromakis
Cited by: 1
References: 36

Abstract

Metal-oxide resistive random-access memory (RRAM) offers strong potential for emerging memory and computing, particularly when integrated into crossbar arrays for in-memory processing. Scalable array operation nonetheless depends on pairing each RRAM element with a well-optimized switching transistor. Given the large selection of metal oxide RRAM materials and delicate power requirements for processes such as electroforming, switching and current limiting, the transistor must be finely optimized for enabling a functional crossbar array. This work defines key criteria for thin-film transistor (TFT) used as switching elements in resistive memory, focusing on high drive current and ultralowoff-state current. An optimized IGZO TFT process is presented, where a$350~^{\circ } $C post-annealing yields anon-current of$681~\mu $A, enabling reliable operation of a TiOxone-transistor one-resistor (1T1R) cell. A three-channel architecture reduces theoff-state current from 3×${10}^{-{7}}$A to 1×${10}^{-{13}}$A, ensuring strong sneak-path suppression while preserving a wideon/offratio. The threshold voltage shifts from −3.0 to −0.6 V, lowering gate-dielectric stress. The resulting TFT successfully electroforms and switches a TiOxRRAM with a 100 k$\Omega $window when the gate ison, while blocking switching in theoffstate. These results demonstrate an effective TFT design for resistive memory integration and emphasize the potential of 1T1R architectures to overcome the conventional memory-compute bottleneck, as memristors enable in-memory computing with high-density operation.

Fields of Study & Subjects

Advanced Memory and Neural Computing Thin-Film Transistor Technologies Ferroelectric and Negative Capacitance Devices

Publication details

Journal / source
IEEE Transactions on Electron Devices
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Volume
73
Issue
3
Pages
1297–1303
Publication date
13 January 2026
Language
EN