Solution Processed ALPO/CdTe-QD/ALPO Gate-Stack-Based Charge Trap Memory Using Burst CV Method

Quantum dot-based memory devices are attracting significant attention due to their potential to enable high-density, low-power, and scalable non-volatile memory (NVM) technologies. Here, we report solution-processed colloidal cadmium telluride (CdTe)-QDs embedded multilayer stacked architecture (2 and 4 nm) charge trapping memory devices with a large memory window (~26.2 V), excellent endurance (over$10^{{4}}$cycles), and superior retention characteristics (~81.6% retention after$10^{{4}}$s). The multilayer stack with different quantum dot (QD) size layers enabled the creation of deeper potential wells and a higher density of localized trap states with distributed energy levels, which significantly enhanced charge retention and suppressed leakage over time. The memory devices also demonstrated stable endurance over 10 000 program and erase cycles, suggesting better electrical integrity of the layered QD system under repeated electrical stress. In addition, retention measurements performed over$10^{{4}}$s revealed that more than 81% of the stored charge was retained, reflecting the strength of charge confinement due to the engineered QD layers and surrounding dielectric barriers. These results demonstrate the potential of QD size and stack engineering to enable next-generation NVM systems with a large memory window and long retention.