Verilog-A Modeling and Experimental Validation of Random Telegraph Signal Noise in Single-Photon Avalanche Diodes

This article presents a physics-based Verilog-A model for simulating random telegraph signal (RTS) noise in single-photon avalanche diodes (SPADs), particularly near breakdown voltage. The model captures both transient waveforms and statistical features of RTS noise, overcoming limitations of conventional circuit-level approaches. Implemented in Cadence Spectre, the model is validated against experimental data, showing excellent agreement in RTS amplitude and hold-time distributions. We analyze how RTS noise characteristics vary with bias voltage and temperature. Results indicate that the on-state probability increases with bias voltage, but decreases with temperature, reflecting the trap-assisted nature of RTS behavior. The model also reveals underlying probabilistic switching mechanisms and accurately captures frequency-domain characteristics of RTS noise, which are critical for evaluating its impact on SPAD performance. This work enables predictive, noise-aware SPAD and circuit co-design by offering a compact, simulator-compatible model and providing a valuable tool for advancing high-performance photon-counting systems.