A Compact Electro-Thermal Model for Predicting ESD-Induced Thermal Failures

Thermal runaway is one of the primary failure mechanisms of semiconductor devices under electrostatic discharge (ESD) stress. However, it is still a great challenge to accurately predict ESD-induced thermal failures due to the complex transient behavior. This article proposes a novel electro-thermal model based on semi-cylindrical grid segmentation for predicting thermal failure under arbitrary ESD waveforms. Unlike existing approaches, the proposed model derives thermal capacitance and resistance directly from physical definitions, thereby reducing the number of fitting parameters. Furthermore, a new method is provided to simply extract relative failure thresholds with room-temperature pulse tests, replacing traditional complex temperature-dependent experiments. To validate the model, a transient behavioral framework foron-state RF switches is developed by incorporating conductance modulation and self-heating effects. The predicted thermal failure levels agree with measurements under transmission line pulse (TLP), human body model (HBM), and international electrotechnical commission (IEC) stress conditions, with discrepancies below 6%. The proposed method offers a compact, accurate, and efficient approach to thermal failure prediction, supporting the optimization of ESD protection strategies and system robustness.