Novel Graphical Method for Uncovering Multiple Harmonic Mitigation Solutions at Ultra-Low Switching in Multilevel Inverters

This article proposes a novel graphical technique for identifying several sets of switching angle solutions with the same fundamental to mitigate different harmonics in a cascaded H-bridge (CHB) multilevel inverter with ultra-low switching frequency at fixed dc input. This technique is then applied on a three-phase seven-level CHB inverter for mitigating 50 lower-order harmonics with the limitation of three switching angles each quarter cycle. This ensures that the switching frequency is the same as the fundamental frequency. Using this technique, it is demonstrated that in more than 45% region of the available range of modulation indices, with just fundamental switching frequency, a seven-level inverter can mitigate all harmonics from its output line voltage up to the 50th order within the 5% range according to the IEEE 519-2022 standard. Apart from this, more than 20% region also provides a total harmonic distortion below the 8% value. The results obtained from the proposed graphical analysis are verified in simulation using MATLAB/Simulink software as well as hardware using an FPGA-based experimental prototype developed in the laboratory. Typical results are provided with three, four, and five switching angles in seven-level, nine-level, and three-level multilevel inverters respectively to validate the findings.