An Adaptable Spectral-Aware Background Calibration for Polynomial-Represented Nonlinearities and Mismatches in TIADCs

This paper presents an all-digital background calibration technique for time-interleaved analog-to-digital converters (TIADCs) to address polynomial-modeled nonlinearities and inter-channel mismatches. By establishing a polynomial framework, we unify the characterization of offset, gain, timing, and nonlinearity errors, enabling simultaneous correction of both sub-ADC distortions and channel mismatches. The error model is adaptable, allowing calibration to be applied to diverse scenarios without fundamental structural redesign. The calibration methodology has fewer limitations on the input signal compared to previous work. In terms of potential challenges of hardware complexity, a spectral-aware computational resource re-allocation strategy is developed to balance calibration performance and overhead. Experiments demonstrate an improvement in SFDR from 47.11/35.09 dB to 84.89/77.32 dB. Circuit synthesis in 28-nm CMOS achieves 0.172 mm² area and 3.57–13.84 mW power consumption at 1 GHz real-time compensation.