Optimization of Input and Sampling Frequencies for Accurate ADC Dynamic Testing Using Incoherent Sampling
Abstract
This paper presents a cost-effective and accurate testing method for Analog-to-Digital Converters (ADCs) using incoherent sampling with a Flat-top window. While coherent sampling is ideal, it is often impractical in mass production due to synchronization difficulties. We quantitatively clarify the relationship between input frequency deviation and Signal-to-Noise-and-Distortion ratio (SINAD) measurement accuracy, deriving a theoretical formula that defines the allowable frequency tolerance based on ADC resolution and sample count. The results indicate that for 10- to 12-bit ADCs, optimizing the input frequency within the “vicinity” of coherency (Hardware Tuning) is sufficient. However, for 14- to 16-bit ADCs where hardware tuning is limited by signal generator resolution, we propose a software-based tuning approach using the Chirp Z-Transform (CZT) to virtually realize coherent conditions. This hybrid strategy enables high-quality dynamic testing using standard industrial Automatic Test Equipment (ATE) without requiring expensive synchronization circuits.
Fields of Study & Subjects
VLSI and Analog Circuit Testing
Advanced Electrical Measurement Techniques
Analog and Mixed-Signal Circuit Design
Publication details
- Journal / source
- IEEE Transactions on Instrumentation and Measurement
- Publisher
- Institute of Electrical and Electronics Engineers (IEEE)
- Volume
- 75
- Pages
- 1–8
- Publication date
- 1 January 2026