Development of FPGA-Based Radar Back-End

This work presents the development of the digital back-end of a pulsed radar based on Field Programmable Gate Array (FPGA) technology. The development includes the stages dedicated to the generation of diverse baseband signals, including square pulses, chirps, and Barker codes, and the processing of the received signal through a series of correlators with adaptable sampling rates for pulse compression and oversampling scenarios. The system is physically implemented taking advantage of the facilities offered by a FlexRIO development platform, as well as the associated development environment. The system parameters, like pulse duration, guard interval, and pulse repetition period, as well as parameters specific to each modulation scheme, are widely adjustable to meet user requirements such as maximum range, Doppler resolution and sensitivity. The stages of signal generation are verified digitally through experimental tests using RF measurement equipment, demonstrating a high consistency between them and what is theoretically predicted. The correlation stage is validated using a synthetic target generated by a digital delay and including a noisy channel, showing a strong correlation between the obtained output and the theoretical expectation. These results constitute an important advance in the development of a low-power, reconfigurable monostatic pulsed radar platform that will serve as a versatile testbed for algorithmic experimentation.