Microbeam Testing of an ASIC Radiation-Hardened 32-bit RISC-V Microcontroller

This work presents microbeam testing of a radiation-hardened 32-bit RISC-V microcontroller device fabricated at the 22-nm FD SOI node. Selective blocks of the device were irradiated with heavy ions, including memory blocks, the device core and peripheral circuitry, as well as the Phase Lock Loop CLK generator. Irradiation results demonstrated that memory errors were not evenly distributed within the device, with Single Event Functional Interrupts (SEFIs) more likely to occur in certain memory blocks. It was demonstrated that the device core and logic circuitry were robust, with all device SEFIs attributed to accumulated memory errors. Particle flux rates were also shown to have nonlinear effects on device SEFI rates. At higher flux rates, the likelihood of memory double-bit upsets increased, which in turn increases the likelihood of a device SEFI. A proposed mathematical framework to better represent the cross-section of more complex digital devices is discussed, which is the summation of cross-sections for individual major blocks within the device.