Toward Efficient LUT-Based PIM: A Scalable and Low-Power Approach for Modern Workloads

Read full text
Authors: Bahareh Khabbazan, Marc Riera, Antonio M. González
Cited by: 0
References: 68

Abstract

Data movement in memory-intensive workloads is several orders of magnitude more energy-consuming than computation. Frequent memory-processor transfers make this a critical bottleneck. Processing-using-memory (PuM) alleviates this by enabling in-memory computation and reducing data movement. In this paper, we proposeLama, a LUT-based PuM architecture that efficiently executes SIMD operations by supporting independent column accesses within each mat of a DRAM subarray. Lama minimizes the number of energy-intensive memory activation commands, which are the primary source of overhead in most PuM architectures. Besides, Lama supports up to 8-bit operand precision without decomposing computations, unlike prior PuM solutions, while incurring only a 2.47% area overhead. Our evaluation shows that Lama achieves an average performance improvement of 8.5× over state-of-the-art PuM architectures and a 3.8× improvement over CPU, along with energy efficiency gains of 6.9$\times /8\times$, respectively, for bulk 8-bit multiplication. We introduceLamaAccel, an HBM-based PuM accelerator that leverages Lama to accelerate LLM inference. By transforming MAC computations into energy-efficient addition and counting operations, LamaAccel achieves up to 9.3$\times /19.2\times$energy reduction and 4.8$\times /9.8\times$speedup over a TPU/GPU, as well as up to 5.8× lower energy consumption and 2.1× higher performance compared to a state-of-the-art PuM baseline.

Fields of Study & Subjects

Advancements in Semiconductor Devices and Circuit Design Semiconductor materials and devices Quantum-Dot Cellular Automata

Publication details

Journal / source
IEEE Transactions on Parallel and Distributed Systems
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Volume
37
Issue
7
Pages
1614–1629
Publication date
22 April 2026
Language
EN