Output Capacitance Extraction of p -GaN HEMTs Under Multi Pulse Switching Across Variable Frequencies and Drain-Bias Stress
Abstract
This study proposes a method to extract the output capacitance (COSS) of 200 V Schottky p-GaN HEMTs under multi-pulse switching conditions. By employing a gate-source shorted configuration, both CGD and CDS are captured during switching transients. To minimize ringing oscillations, a four layer printed circuit board (PCB) with low parasitic inductance was designed, along with a top-cooled heat sink to enhance thermal management. The results under various switching frequencies and off-state VDS biases reveal that COSS variations arise from the combined effects of VDS-induced electron trapping during the off-state and hole injection during reverse conduction. The extraction method and findings contribute to the accurate evaluation of COSS in multi-pulse switching applications and aid in the design of power converters and the switching performance prediction of GaN power devices.
Fields of Study & Subjects
GaN-based semiconductor devices and materials
Silicon Carbide Semiconductor Technologies
Electromagnetic Compatibility and Noise Suppression
Publication details
- Journal / source
- IEEE Transactions on Power Electronics
- Volume
- 41
- Issue
- 6
- Pages
- 8927–8937
- Publication date
- 12 January 2026