DC-Link Balancing Control-Based on ADRC for Three-Level NPC Inverter in PMSM Drive Systems

The three-level neutral point clamped (3L-NPC) inverter is widely used in permanent magnet synchronous motor (PMSM) drive systems for its low total harmonic distortion (THD) and high efficiency but suffers from neutral point voltage (NPV) drift and third-order harmonic fluctuations. With a relatively small DC-link capacitance, the NPV exhibits more pronounced high-frequency fluctuations. Although conventional carrier-based pulse width modulation (CBPWM) schemes effectively mitigate NPV drift, the regulation latency, due to the injected zero sequence voltage cannot be adjusted within each switching cycle, inherently limits their ability to suppress high-frequency NPV fluctuations. Therefore, this paper investigates the mechanism of NPV fluctuation in three-level NPC inverters and establishes a linearized model describing the relationship between the injected zero-sequence voltage and NPV dynamics. Based on this model, a CBPWM control strategy incorporating active disturbance rejection control (ADRC) is proposed to enhance both steady-state and dynamic NPV regulation. An extended state observer (ESO) is employed to estimate and compensate for the third-harmonic disturbances responsible for NPV oscillations in real time, enabling active suppression of voltage ripple without increasing switching frequency or computational complexity. Experimental results verify that the proposed method achieves stable NPV regulation and smooth torque response under both steady-state and dynamic conditions, thereby enhancing the overall performance of a 3L-NPC inverter-based PMSM drive.