A General Zero Common-Mode PWM for Paralleled Inverters and Optimization of Differential-Mode Circulating Current
Abstract
For parallel inverters, the original zero common mode (ZCM) space vector PWM (SVPWM) scheme theoretically eliminates common-mode (CM) voltage but suffers from two critical drawbacks: reduced modulation index and aggravated differential-mode circulating current (DMCC), necessitating larger-sized coupling inductors. To address DMCC deterioration, this work proposes a general ZCM scheme employing pulse-phase shifted SPWM. By identifying volt-second imbalance induced by periodic phase shift ratio variations as the root cause of DMCC degradation, the method introduces duty cycle correction to optimize it. Compared to conventional interleaved SVPWM, the proposed approach reduces CM voltage without exacerbating DMCC.
Fields of Study & Subjects
Multilevel Inverters and Converters
Electromagnetic Compatibility and Noise Suppression
Microgrid Control and Optimization
Publication details
- Journal / source
- IEEE Transactions on Power Electronics
- Publisher
- Institute of Electrical and Electronics Engineers (IEEE)
- Volume
- 41
- Issue
- 6
- Pages
- 8803–8808
- Publication date
- 12 January 2026