A Flipped-Voltage-Follower-Based LDO With Scaled-Down Current Buffer Compensation for Wide Load Current Range

The flipped voltage follower (FVF) based low dropout regulator (LDO) has been developed rapidly due to its fast transient response, high power supply rejection (PSR) and reduced complexity. The conventional FVF loop encounters stability challenges under heavy load conditions when employing dominant pole compensation with a large output capacitance. This paper proposes a solution to extend the load current range by reducing the size of the current buffer and adding a small feed-forward capacitor (Cc). In addition, a transient current enhanced buffer is used to reduce output voltage spikes. The proposed LDO has been verified in a standard 0.18-μm CMOS process and occupies an active area of 0.047 mm2. Experimental results show that this LDO can deliver 300 mA load current at 200 mV dropout voltage, with a current efficiency of 99.99%. The undershoot voltage under maximum load current change in 100ns edge time is 35.8 mV with a 0.95 μs recovery time.