Reconstructed 1-D Cauer Thermal Network Considering Thermal Coupling Effects for Efficient Junction Temperature Estimation in Multidie IGBT Modules

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Authors: Minsheng Zhou, Lei Wang, Ningning Wei, Benchao Zhu, Haoyang Li, Lijun Diao
Cited by: 0
References: 37

Abstract

Accurately and efficiently estimating the junction temperature of insulated gate bipolar transistor (IGBT) modules is critical for reliability. This article proposes an average-power-driven simplified reconstructed one-dimensional (1-D) Cauer thermal network (APD-SR1DCTN) that incorporates coupling effects for fast and accurate junction temperature estimation. First, a reconstructed 1-D Cauer thermal network (R1DCTN) is introduced that shares the same topology as the 1-D Cauer thermal network (1DCTN). Under a node-temperature consistency constraint, Kirchhoff's current law (KCL) equations of all nodes in the three-dimensional (3-D) Cauer thermal network (3DCTN) and the R1DCTN are jointly formulated to derive reconstructed thermal-resistance formulas, enabling R1DCTN to combine 1DCTN-level efficiency and 3DCTN-level accuracy. Secondly, analysis indicates the first-order and second-order temperature components in the reconstruction coefficients are negligible under AC operation, simplifying the reconstructed thermal-resistance formulas to yield APD-SR1DCTN, which is modeled using only two preset parameters (average power and DC gain). Furthermore, analysis shows the method has a relatively wide feasible operating condition range (FOC). Finally, simulations and experiments confirm the method's effectiveness, including under power unevenness from die failures. The method offers high accuracy and efficiency, wide applicability, and resilience to die failure, providing an efficient solution for junction temperature estimation in multi-die IGBT modules.

Fields of Study & Subjects

Silicon Carbide Semiconductor Technologies Multilevel Inverters and Converters Thermal Analysis in Power Transmission

Publication details

Journal / source
IEEE Transactions on Power Electronics
Volume
41
Issue
7
Pages
11337–11358
Publication date
3 February 2026