A Low-Parasitic-Capacitance and High-Thermal-Uniformity Base-Substrate Structure for 15 kV Silicon Carbide Devices Based on Liquid-Vapor Two-Phase Material

High-voltage silicon carbide (SiC) power devices require packaging that simultaneously suppresses electromagnetic interference (EMI) and manages concentrated heat fluxes without sacrificing high-voltage capability. This paper proposes an integrated substrate-baseplate co-design that achieves synchronous electrical-thermal optimization. A double-side-layout Direct Bonded Copper (DBC) substrate minimizes the facing AC copper area and reduces common-mode capacitance (CMC) by 56.41% (30.07 pF vs. 68.99 pF), thereby mitigating common-mode current under fast transients. In parallel, a liquid-vapor two-phase heat-spreading structure integrated into the substrate-baseplate enhances lateral heat spreading, lowering the maximum junction temperature by 11°C and reducing the junction-to-ambient thermal resistance by 11.46% under multi-chip operation. System-level validation on a Buck converter confirms EMI improvement: the proposed structure achieves a 6 dB reduction in conducted common-mode noise, consistent with the measured CMC decrease. The results demonstrate that the proposed co-design provides a manufacturable path to concurrent EMI suppression and thermal performance enhancement for next-generation high-voltage SiC power devices.