Mechanism Analysis of Pressure Impacts on Turn-Off Transient Process in Single Press-Pack IGBT Chip

For press-pack insulated gate bipolar transistors (PPIs), an external clamping force is applied to ensure adequate electrical contact between multilayers. The resulting pressure field significantly influences the chip's turn-off capability and is attracting increasing attention. In this article, the pressure effects on the overall turn-off transient of a PPI chip are investigated comprehensively through theoretical analysis, experimental measurements, and semiconductor simulations. Under high-voltage/high-current conditions, as pressure non-uniformity increases, dynamic avalanche and the ensuing current filaments are triggered earlier and persist longer, increasing the risk of failure. In non-destructive experiments, the pressure non-uniformity on the chip is increased stepwise by raising the clamping force. Around the nominal clamping force, a 1 kN increase reduces the dynamic avalanche onset voltage by about 200 V. Two-cell simulations indicate that current filaments form following the onset of dynamic avalanche, leading to a 41% rise in the maximum current density Jmax. This increase intensifies the maximum localized electro-thermal stress and continues to grow with time. In practice, Jmax and its effects are considerably larger than suggested by the simulations, because real PPI chips comprise far more cells, which promotes stronger filament localization.