Multiparameter Dynamic Mode Decomposition for Electrothermal Analysis of Chiplet Systems

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Authors: Quan Wu, Chengliang Dai, Guoxiong Cai, Qiuqi Li, Li‐Ye Xiao, Na Liu, Qing Huo Liu
Cited by: 1
References: 33

Abstract

Chiplet employs advanced packaging techniques to heterogeneously integrate chips with different processes and functions, featuring multidie integration and high density. However, the increased power density and thermal coupling within these systems introduce significant electrothermal issues, leading to heat accumulation and power management complexities. Meanwhile, due to the complex multilayer heterogeneous integration and multiscale geometric features of chiplet systems, the number of degrees of freedom increases sharply, resulting in significant computational challenges and high demands for computational resources. Traditional numerical methods, such as finite element analysis (FEA), although capable of providing high-accuracy results, are computationally expensive. This work proposes a parametric dynamic mode decomposition (DMD)-based reduced-order modeling method for the electrothermal analysis, extending DMD to handle variations in parameters such as convection coefficients and thermal conductivity, thereby enabling robust analysis for diverse design requirements. As a matrix decomposition technique based on singular value decomposition (SVD), DMD extracts low-rank structures that capture both temporal dynamics and spatial correlations. The numerical results show that the proposed method provides an efficient and reliable solution for electrothermal analysis of chiplets, achieving a 4–9 times speedup over commercial software like COMSOL Multiphysics, making it an alternative for optimization design and reliability analysis of advanced systems.

Fields of Study & Subjects

Model Reduction and Neural Networks Low-power high-performance VLSI design Electromagnetic Compatibility and Noise Suppression

Publication details

Journal / source
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Volume
34
Issue
3
Pages
716–724
Publication date
12 January 2026