Hardware-Aware Offline Training of CTT-Based Neuromorphic Hardware

Neuromorphic hardware combined with spiking neural networks (SNNs) supports low-power, highly parallel AI inference. Inference accuracy can drop sharply when models trained under ideal software assumptions are deployed on inherently noisy hardware. This noise is especially evident in the current of subthreshold operated charge-trap transistors (CTTs) representing network weights. Although CTTs are CMOS-compatible and attractive for large-scale neuromorphic systems due to their energy and cost efficiency, programming imprecision and process, voltage, and temperature (PVT) variations can significantly alter their current, degrading network accuracy. In this article, CTT weight and neuron sources of variability are first identified. Multiparameter noise models are then derived from the hardware components, and sampled noise is injected into both weights and neuron parameters during training, improving robustness across a wide range of noise levels without increasing model size or significantly increasing training time. A novel training algorithm is introduced in which each mini-batch is evaluated multiple times under different noise samples, with the loss optimized to enforce consistency across various noise values. The software behavioral model is verified using Cadence simulations across 45 binary classifiers. The accuracy of ideal-trained classifiers degrades by up to 44.2% under hardware-induced noise, while the proposed training algorithm improves accuracy by up to 23.34%. The validated framework and training algorithm are then used for larger networks performing image classification on CIFAR-10 and CIFAR-100 datasets, improving accuracy from a random state under noise to competitive levels relative to state-of-the-art, with the main overhead being additional epochs determined by noise range rather than network size.