A Hybrid LUT-CORDIC Architecture for High-Performance Rectangular-to-Polar Conversion
Abstract
In this brief, a hybrid look-up table (LUT)-coordinate rotation digital computer (CORDIC) architecture for rectangular-to-polar conversion is proposed. The architecture performs domain folding and a small number of CORDIC iterations to transform the input vector into a reduced angular range, followed by a compact LUT that stores precomputed reference values used to derive the final magnitude and phase. Taylor series approximation and dynamic truncation are employed to minimize LUT storage while maintaining numerical precision. FPGA implementation on a Xilinx XCZU11EG device shows that the design can achieve the lowest latency among competing designs while maintaining competitive performance in power consumption and accuracy, demonstrating its efficiency and suitability for high-performance signal processing systems.
Fields of Study & Subjects
Numerical Methods and Algorithms
Digital Filter Design and Implementation
Low-power high-performance VLSI design
Publication details
- Journal / source
- IEEE Transactions on Very Large Scale Integration (VLSI) Systems
- Volume
- 34
- Issue
- 5
- Pages
- 1687–1691
- Publication date
- 4 March 2026
- Language
- EN