A Compact Inverter-Based Neural Amplifier With Local and System Dual CMFB Loops Through Paralleled Pseudo Transconductors

This brief presents a CMOS inverter (INV)-based amplifier with local and system dual common-mode feedback (CMFB) loops through paralleled pseudo transconductors (PTs) for multichannel neural signal recording. The PT-INV forms a DC-coupled input to ensure a high input impedance, and local and system dual CMFB loops are introduced through the paralleled PT terminals of the INV. The local CMFB (L-CMFB) with the capacitor-reused topology not only reduces the die area and increases the differential-mode (DM) gain but also reduces the common-mode (CM) gain. The system CMFB (S-CMFB) loop detects the multiple CM outputs, and further increases the overall CMRR. The proposed PT-INV based instrumentation amplifiers (IAs) with dual CMFB loops are fabricated in a 0.18-$\mu $m CMOS process, and an overall CMRR of 87dB is achieved with a compact single-channel core area of 0.02mm2.