A 55 MHz Bandwidth and Sub- μ V Offset Precision Amplifier With Two-Step Dynamic Offset Calibration and Noise Suppression Techniques
Abstract
A fully differential offset-stabilized amplifier with a two-step dynamic offset calibration achieving sub-$\mu $V offset and a 55 MHz gain-bandwidth product (GBW) is presented. The two-step offset calibration combines digitally-assisted auto-calibration with dynamic offset compensation (DOC) that maintains ultralow residual offset. The slow-settling auto-zeroing (AZ) technique is integrated with a proposed chopping scheme, which suppresses noise across the entire bandwidth, enabling higher bandwidth operation with reduced ripple and noise aliasing. Fabricated in a 180 nm BCD process, the prototype occupies an area of 1.32 mm2. The measurements show that the input-referred offset standard deviation is reduced by 99.97%, from 0.8 mV to 206nV. Furthermore, the noise spectrum is nearly flat with the high-frequency ripple effectively suppressed. A noise floor of 7.8 nV/$\boldsymbol {\surd }$Hz has been achieved, corresponding to a noise efficiency factor (NEF) of 15. These results demonstrate its potential to be widely adopted in high-accuracy and high-bandwidth applications.
Fields of Study & Subjects
Analog and Mixed-Signal Circuit Design
Radio Frequency Integrated Circuit Design
Low-power high-performance VLSI design
Publication details
- Journal / source
- IEEE Transactions on Very Large Scale Integration (VLSI) Systems
- Volume
- 34
- Issue
- 7
- Pages
- 2033–2040
- Publication date
- 4 March 2026
- Language
- EN