A 250-Mb/s On-Chip Capacitive Digital Isolator With 200 kV/ μ s Common-Mode Transient Immunity

IEEE Transactions on Very Large Scale Integration (VLSI) Systems 2026

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Authors: Yongqiang Ding, Jiazhen Zhu, Jian Xu, Huajian Li, Siji Wang, Huanyong Li, Chenggang Yan, Weiqiang Liu
DOI: 10.1109/tvlsi.2026.3705872
Cited by: 1
References: 10

Fields of Study & Subjects

Advancements in PLL and VCO Technologies Analog and Mixed-Signal Circuit Design Radio Frequency Integrated Circuit Design

Publication details

Journal / source
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Volume
34
Issue
9
Pages
3052–3055
Publication date
30 June 2026