Manufacturing-aware adjoint optimization for DRC-compliant silicon photonic devices

We present a manufacturing-aware adjoint-based shape optimization methodology for silicon photonic devices that incorporates design rule checking (DRC) directly into the optimization loop. The DRC engine is treated as a black-box feasibility oracle, and a two-stage update filter combines a global line search with greedy coordinate backtracking so that only DRC-compliant iterates are accepted. We apply the method to a dual-layer silicon/silicon-nitride focused grating coupler and achieve a coupling loss of 3.88 dB, improving by 1.14 dB over a uniform-width baseline, while satisfying foundry rules throughout the optimization and avoiding post-optimization legalization.